This invention relates to thin-film transistors (TFTs) comprising a semiconductor film which provides a transistor channel and having a drain which comprises semiconductor layers of different doping concentrations, particularly but not exclusively TFTs of the so-called "coplanar" type in which the source and drain are formed from layers deposited on the same face of the semiconductor film as the gate structure. TFTs in accordance with the present invention are designed to reduce degradation of their characteristics (both on-state current and off-state leakage current) due to operation at high drain bias. Such transistors are of interest at present for large-area electronic circuitry on glass, for example in the driving circuitry of a large-area liquid-crystal display (LCD) or a sensor array or memory array or a printer. The invention also relates to methods for the manufacture of TFTs.
Published Japanese patent application Kokai JP-A-01-128573 of 1989 discloses a thin-film transistor comprising a semiconductor film which provides a transistor channel coupled to a gate of the transistor. The transistor has laterally separate source and drain with the transistor channel located therebetween. At least the drain which is disposed at a face of the semiconductor film comprises an intermediate semiconductor layer which lies between the semiconductor film and a semiconductor electrode layer; this intermediate layer has a lower conductivity-determining doping concentration than the electrode layer and serves to reduce the electric field intensity in the region between the gate and the drain electrode layer.
In the off state of this known TFT (i.e. when a negative or zero gate voltage is applied in an n channel transistor, or when a positive or zero gate voltage is applied in a p channel transistor), the electric field formed by the applied gate and drain voltages is distributed in the low-doped intermediate layer so reducing the field intensity at the drain junction. This reduction in field is believed to reduce the number of charge-carriers generated at trap levels in the semiconductor film in the vicinity of the drain, for example trap levels at crystal-grain boundaries of a polycrystalline semiconductor film. Hence the off-state leakage current across the drain junction is reduced by the inclusion of this intermediate layer.
However, the present applicants have found that the off-state leakage current can increase during the life of a TFT due to operation of the TFT at high drain bias, and the applicants believe that this degradation in off-state leakage current is due to the formation of donor levels near the middle of the energy bandgap of the semiconductor film by hot carriers generated in the space charge region at the drain junction in the on-state of the TFT. Thus, the off-state characteristic is degraded by high drain bias in the on-state operation of the TFT. The on-state current is also degraded (i.e. reduced) by repeated operation at high drain bias. A shift in the threshold voltage of the TFT may also occur.